uRTEDemo_03_Nucleo-F446RE_SystemStates_10_Model

SignalDataObject

HWI_Button

Hardware interface for the button

Diagrams

Safety

Required
SIL derived -
overwrite (SIL_manual) derived
reason (SIL_manual_reason)
SIL -
Achieved
SIL achieved QM
justification

Properties

Base
NameHWI_Button
Type SignalDataObject
Description

Hardware interface for the button

User-IDSignalDataObject_48
UID_igsbkOZiEeyZ2OzYlvU4PA
signal configuration
miminum Age 0
maximum Age 2
Storage (isLocal) local signal
Checksum false
Force Sync false
Inline false
effective inline false
Has ISR API false
effective ISR API deactivated for all signals
datasignal configuration
Initial value: false
Pointer access: false
Datatype: uRTE_boolean_t
Drivers
In-Driver: ButtonRead

Software Layer

Data-In Runnables (1)

Runnables in which this signal is an input.

Unit Parent Function calls Technical Functions Requirements Type Tasks WCET Stack ROM Globals ProtectionSets SIL req SIL ach sub Technical Functions sub Requirements) Has a return value SystemStates Ingoing Trigger Ports Outgoing Trigger Ports Ingoing Data Ports Outgoing Data Ports

Acquires the button state periodically and provides button signals

Button
Runnable 0 0 0
QM QM false
  • Runnable_run_readButton_Tick
  • Runnable_run_readButton_Edge_OUT
  • run_readButton_HW_IN
  • Runnable_run_readButton_Button_OUT
  • Runnable_run_readButton_button_pressed_cnt

Tasks (1)

Tasks in which the signal is used.

Task Core SIL Priority Software States Signals Init Hardware OutputSections Own TimeBase Stack

Task responsible for reading the button state

Arm® Cortex®-M4 SIL_1 6 - false .rtos.task.Button

System-States (2)

SystemStates in which the signal is used.

State isStart Runnables Tasks

In this state, an LED will blink.

true

A state that is entered if the user has pressed the button. Here, periodic UART messages are sent.

false

Hardware Layer

Hardware Components (3)

Associated hardware. Cores executing the associated runnables, memory used, peripherals interfaced.

Component Type Start End SIL req SIL ach Sub-Components Technical Functions sub Technical Functions Requirements sub Requirements

Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions

Core - - - QM

B1 [Blue PushButton] on the Nucleo Board

Periphery GPIOC_BASE GPIOD_BASE - 1 - QM

The STM32F446RE RAM module

RAM 0x20000000 0x2001ffff - QM