uRTEDemo_03_Nucleo-F446RE_SystemStates_10_Model

SignalDataObject

HWO_UART

Hardware Out interface for UART.
No Signal-Datatype will be defined so that a typedef will be generated into the signal configuration.
Pointer access is granted so signal memory can be used directly by the application.

Warnings

RTE (1)

RTE Warnings for SignalDataObject HWO_UART
RTE warnings are related to the configured behaviour of the RTE.

HWO_UART allows pointer access to its payload.

Diagrams

Safety

Required
SIL derived QM
overwrite (SIL_manual) derived
reason (SIL_manual_reason)
SIL QM
Achieved
SIL achieved QM
justification

Properties

Base
NameHWO_UART
Type SignalDataObject
Description

Hardware Out interface for UART. No Signal-Datatype will be defined so that a typedef will be generated into the signal configuration. Pointer access is granted so signal memory can be used directly by the application.

User-IDSignalDataObject_113
UID_x3uk4OiwEeyZCNhXq78uhw
signal configuration
miminum Age 0
maximum Age 0
Storage (isLocal) local signal
Checksum false
Force Sync false
Inline false
effective inline false
Has ISR API false
effective ISR API deactivated for all signals
datasignal configuration
Initial value:
Pointer access: true
Datatype: undefined, a type definition will be generated
Drivers

OutDrivers (1)

OutDrivers the signal can send data to.

Unit Parent Function calls Technical Functions Requirements Type Tasks WCET Stack ROM Globals ProtectionSets SIL req SIL ach Signals Runnables DataType Is Synchronous Hardware

writes Data to the UART module.
No DataType is chosen, so that a typedef file will be generated.

UART
OutDriver 0 0 0
- QM None true

Requirement Layer

(Safety)Requirements (1)

Requirements referencing to this signal.

(Safety)Requirement Parent User-ID Author Creation Date Start Date Deadline Expense Responsibe Category Type Status Function Type SIL derived SIL manual SIL effective Tests Technical Functions Software Hardware Signals Global variables Activation events Use-Cases User-Stories Refining Conflicting refined by conflicted by

Demonstrate the use of scalers and validators.
Make use of age restrictions, checksums and pointer access.

SafetyRequirement_111 Thu Jun 09 20:52:41 CEST 2022 0.0 product functional approved System_Function QM derived QM

Software Layer

Data-Out Runnables (1)

Runnables in which this signal is an output.

Unit Parent Function calls Technical Functions Requirements Type Tasks WCET Stack ROM Globals ProtectionSets SIL req SIL ach sub Technical Functions sub Requirements) Has a return value SystemStates Ingoing Trigger Ports Outgoing Trigger Ports Ingoing Data Ports Outgoing Data Ports

Sends UART messages periodically via the UART signal

UART
Runnable 0 0 0
QM QM
true
  • Runnable_run_UART_send_TPortIN_1
  • Runnable_run_UART_send_DPortIN_1
  • Runnable_run_UART_send_DPortIN_2
  • Runnable_run_UART_send_UART_OUT

Tasks (1)

Tasks in which the signal is used.

Task Core SIL Priority Software States Signals Init Hardware OutputSections Own TimeBase Stack

Task responsible for sending out UART protocolls

Arm® Cortex®-M4 SIL_1 5 - false .rtos.task.UART

System-States (1)

SystemStates in which the signal is used.

State isStart Runnables Tasks

A state that is entered if the user has pressed the button. Here, periodic UART messages are sent.

false

Hardware Layer

Hardware Components (3)

Associated hardware. Cores executing the associated runnables, memory used, peripherals interfaced.

Component Type Start End SIL req SIL ach Sub-Components Technical Functions sub Technical Functions Requirements sub Requirements

Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions

Core - - - QM

UART module connected to pin TX/RX PA2/PA3 at 115200 8N1

Periphery USART2_BASE USART3_BASE - 1 - QM

The STM32F446RE RAM module

RAM 0x20000000 0x2001ffff - QM