uRTEDemo_03_Nucleo-F446RE_SystemStates_10_Model

SignalDataObject

HWI LED

Hardware interface for the LED

Diagrams

Requirements Model
Logical Function Model
Software Model
Hardware Model

Safety

Required
SIL derived -
overwrite (SIL_manual) derived
reason (SIL_manual_reason)
SIL -
Achieved
SIL achieved QM
justification

Properties

Base
NameHWI LED
Type SignalDataObject
Description

Hardware interface for the LED
User-IDSignalDataObject_17
UID_Qh-JIOTWEeyrV5NXTwe27Q
signal configuration
miminum Age 0
maximum Age 0
Storage (isLocal) local signal
Checksum false
Force Sync false
Inline false
effective inline false
Has ISR API false
effective ISR API deactivated for all signals
datasignal configuration
Initial value: 0
Pointer access: false
Datatype: uRTE_boolean_t
Drivers

OutDrivers (1)

OutDrivers the signal can send data to.

Unit Parent Function calls Technical Functions Requirements Type Tasks WCET Stack ROM Globals ProtectionSets SIL req SIL ach Signals Runnables DataType Is Synchronous Hardware
drv_LED

Hardware write-Interface towards the LED

 LED
OutDriver 0 0 0
QM QM uRTE_boolean_t true

Software Layer

Data-Out Runnables (1)

Runnables in which this signal is an output.

Unit Parent Function calls Technical Functions Requirements Type Tasks WCET Stack ROM Globals ProtectionSets SIL req SIL ach sub Technical Functions sub Requirements) Has a return value SystemStates Ingoing Trigger Ports Outgoing Trigger Ports Ingoing Data Ports Outgoing Data Ports
run_LED

Controls the LED signal and thus the LED

 LED
Runnable 0 0 0
- QM false
  • Runnable_00_blink_Tick
  • Runnable_blink_Button_IN
  • Runnable_00_blink_OUT

Tasks (1)

Tasks in which the signal is used.

Task Core SIL Priority Software States Signals Init Hardware OutputSections Own TimeBase Stack
LED

Task responsible to let the LED blink

 Arm® Cortex®-M4 SIL_1 4 - false .rtos.task.LED

System-States (2)

SystemStates in which the signal is used.

State isStart Runnables Tasks
Blink

In this state, an LED will blink.

 true
UART

A state that is entered if the user has pressed the button. Here, periodic UART messages are sent.

 false

Hardware Layer

Hardware Components (3)

Associated hardware. Cores executing the associated runnables, memory used, peripherals interfaced.

Component Type Start End SIL req SIL ach Sub-Components Technical Functions sub Technical Functions Requirements sub Requirements
Arm® Cortex®-M4

Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions

 Core - - - QM
PA5

LD2 [Green Led] on the Nucelo Board

 Periphery GPIOA_BASE GPIOB_BASE - 1 - QM
main

The STM32F446RE RAM module

 RAM 0x20000000 0x2001ffff - QM